a) Field of the Invention
The present invention relates to a semiconductor device and its manufacture method, and more particularly to a semiconductor device with ohmic contacts on a compound semiconductor and its manufacture method.
b) Description of the Related Art
An SiO.sub.2 film formed on the surface of a silicon substrate is a good insulating film with a low density of surface states. It is difficult, however, to form a good insulating film with a low density of surface states on the surface of a compound semiconductor. For example, although SiN, SiO.sub.2, Ga.sub.2 O.sub.3 and the like have been studied as materials of an insulating film to be formed on the surface of GaAs, it is difficult to lower the density of surface states.
Since a good interface between a compound semiconductor and an insulating film cannot be obtained, it is difficult to form an FET (MISFET) of a metal/insulator/semiconductor structure by using a compound semiconductor such as GaAs. In order to solve this interface problem between semiconductor and insulator, other structures have been adopted, such as a high electron mobility transistor (HEMT) and an FET (MESFET) of a metal/semiconductor structure using Schottky contacts between a gate electrode and the semiconductor without forming a gate insulating film between the channel region and the gate electrode.
A potential barrier between GaAs and metal becomes nearly constant (about 0.8 eV) independent from the work function of metal, because of the pinning effect of GaAs. Therefore, an energy level difference becomes large between the Fermi level of metal and the level at the lower end of the conduction band of GaAs, and the electrical resistance of an ohmic contact between n-type GaAs and metal is likely to increase.
As an approach to lowering the resistance, a method of processing the surface of GaAs with a solution of (NH.sub.4)S.sub.x or NaS is now being studied. This process bonds Ga atoms exposed on the GaAs surface with S atoms, forming Ga--S bonds. The GaAs surface is covered with S atoms of approximately one atomic layer and is made chemically stable. With this method, a photoluminescence intensity increases and the potential barrier at an interface between the GaAs and the metal becomes dependent upon a metal work function.
The pinning effect can be eliminated by covering the GaAs surface with S atoms of approximately one atomic layer. However, deposition of an SiN film, an SiO.sub.2 film or the like on the S atom layer considerably lowers the photoluminescence intensity and suppresses the pinning effect elimination. In addition, deposition of a metal layer on the S atom layer makes metal atoms in the metal layer react with GaAs during heat treatment, so that the pinning effect elimination is suppressed.
FETs using a compound semiconductor, typically GaAs, have been used as high frequency electronic devices. For example, GaAs MESFETs are widely used for a mobile communications system such as cellular phones, and HEMTs for a satellite broadcasting reception antenna.
Needless to say, high frequency FETs are required to have high gains and low noises. A breakdown voltage is also an important factor for determining operation ratings. One factor of determining a breakdown voltage of FET is a surface trap level at the interface between a semiconductor layer and a passivation film of FET.
Generally, the density of surface states at the interface between the compound semiconductor and an insulating film used as a passivation film is higher than that at the interface between an Si and an SiO.sub.2 film, as described above. In order to prevent any trap caused by the surface trap level near the gate electrode of an FET, a buried gate structure has been used conventionally. The breakdown voltage is mostly influenced by the surface trap level.
With the buried gate structure, the gate electrode is buried in a channel layer of a compound semiconductor or in a cap layer. The side walls of the gate electrode directly contact the channel layer or cap layer. Since the interface between the channel or cap layer and an insulating film can be positioned remotely from the channel region under the gate electrode, traps by the surface trap level can be prevented.
The density of surface states can be lowered by depositing an insulating film after the surface of the compound semiconductor is cleaned sufficiently.
With the buried gate structure, the side walls of the gate electrode contact the channel or cap layer. It is therefore necessary to suppress leakage current from flowing through the contact area. From this reason, the impurity concentration of the channel or cap layer cannot be made high.
With the method of depositing an insulating film after the surface of the channel layer is cleaned, it is difficult to lower the density of surface states to a sufficiently low value.
The property of ohmic contacts of a high speed semiconductor device directly influences the device performance. It has been therefore desired to form an ohmic contact having a low contact resistance and an excellent ohmic contact property.
The structure and manufacture method of a conventional ohmic contact will be described, by taking as an example an n-type GaAs typical to a group III-V compound semiconductor. For example, in order to form an ohmic contact on an n-type GaAs, AuGeNi alloy is deposited on GaAs to make an alloy of AuGeNi and GaAs and form an ohmic contact layer. If n-type dopants are diffused at a high concentration near the surface layer of GaAs, the Schottky barrier layer can be made thin and tunneling of electrons through this layer becomes easy. This tunneling current realizes an ohmic contact. It is difficult, however, to control the diffusion of Ge by heat treatment. In order to improve the controllability and reliability of manufacturing processes, it is desired to form an ohmic contact of non-alloy without performing heat treatment.
An ohmic contact of non-alloy may be formed by eliminating the Fermi level pinning and contacting GaAs with a metal having a low work function to lower the Schottky barrier.
From this viewpoint, the present inventors have tried to form an ohmic contact of non-alloy. The present inventors also disclosed in JP-A-8-248170 a method of lowering the density of surface states of GaAs to 5.times.10.sup.10 eV.sup.-1 cm.sup.-2 by depositing a GaS layer on GaAs by molecular beam epitaxy (MBE) using as a source material tertiary-butyl-gallium-sulfide cubane ((t-Bu)GaS).sub.4.